How did the fourth-generation BiCS flash memory evolve?

How 3D flash records data:

3D flash memory will have different trade names for different flash memory manufacturers. For example, BiCS is the 3D flash configuration proposed by Toshiba. The vertical stacking of flash memory is not as simple as everyone thinks, involving all aspects of the process. At present, domestically produced flat-panel flash memory is not well made. 3D flash memory only proposes a 24-layer stacking concept, far behind the foreign level.

3D flash memory changes the original planar memory unit to the vertical direction, and the different layers are connected by perforation. Its operation mode is essentially different from the traditional 2D plane flash memory. Each flash memory factory has experienced hardships in the process of transforming 3D. The cost is high.

A friend who is familiar with the 2D flash structure knows that there must be a flash memory unit, and there is a need for both Bit Line and Word Line. In addition, there is one more Select Gate in the 3D flash memory. The three can work together to establish a specific target unit for data reading and writing.

The data stored in the flash memory unit changes by applying different voltages. Constantly changing the Word Line allows data to be written between different Pages.

Between different flash recording unit arrays, switching gates need to be selected by selecting gates. In the three-dimensional structure, a specific target is established by three parameters, which is similar to Intel's proposed 3D XPoint, but 3D flash is aimed at cost reduction, and 3D XPoint is cost-effective.

Specific to a specific flash recording unit, you can see its unique cylindrical structure:

The center of the cylinder is the core silicon crystal, and the data recording is essentially a circle of Charge Trap Layer shown in blue. The flash memory records data through the potential state, and the Charge Trap Layer is the core of the charge expression potential. Depending on the type of flash memory, there may be many different forms of MLC, TLC, and QLC, each of which needs to express four, eight, and sixteen potential states to achieve storage of 2bit, 3bit, and 4bit data.

How 3D flash is changed from wafer to grain:

Like the CPU, the flash chip is produced by photolithography, and after cutting, there are a large number of small chips on each wafer. The original factory will test the quality of these chips through a unique process, taking only the best quality chips to make original flash memory particles.

Such a small chip still has a way to go from the particles.

Toshiba stacks up to 16 small chips and connects them using TSV through-silicon via technology, which is a re-stacking of 3D flash vertical stacks for extremely high memory density:

Finally packaged into the following picture of our common flash granules, these granules will be further tested by the original factory, after passing the original factory logo, become the original flash memory shipment.

With 96-layer stacked 3D flash memory and 16-layer Die, the final single flash memory can get 1TB (3D TLC) or 1.5TB (3D QLC) capacity.

It can be said that there is still a long way to go before flashing localization.